1. Field of the Invention
The present invention relates to a technique of testing a semiconductor memory device. More particularly, it relates to a semiconductor memory device having a memory cell array divided into a plurality of blocks to and from which data of a plurality of bits (2N bits) based on N-bit address degeneration are input and output in a test mode, and a method for testing the semiconductor memory device.
2. Description of the Related Art
With recent improvements in the capacity of semiconductor memory devices, their increasing test time is causing a problem. To cope with this, a test mode function for compressing data of 2N bits based on N-bit address degeneration and simultaneously outputting the compressed data is gradually provided for the semiconductor memory devices.
According to a known test mode function, a test mode is firstly set, and identical data is simultaneously written in each cell for 2N bits. Thereafter, the data of 2N bits are compressed and simultaneously read, thereby realizing a high-speed data reading to shorten test time. This test mode function may be effective to check whether or not many bits (for example, all bits of each word) coincide with one another.
The above test mode function has, however, a drawback that, when information of a certain bit among the read 2N bits does not coincide with information of the other bits (this status is hereinafter referred to as "fail"), it cannot identify the "fail" bit in the 2N bits. Accordingly, the test function based on compressed data alone is insufficient for failure analysis. In addition, this technique requires the test to be done 2N times, thereby consuming enormous test time.
On the other hand, in semiconductor memory devices having a redundant function, their capacities as well as their bit capacities of redundant cells are increasing. It is, therefore, required to provide a technique for efficiently using the redundant cells as well as a technique for efficiently carrying out a test with a test mode function such as the one explained above.
In this case, if data to be replaced by the redundant function are 2M bits among 2N bits, the test function based on 2N-bit-compressed data cannot tell which of 2L sets of 2M bits (2N=2M.multidot.2L) shall be replaced. This is disadvantageous for a manufacturer in efficiently using the redundant cells.